[MLton-commit] r7411
Wesley Terpstra
wesley at mlton.org
Sat Feb 6 02:18:19 PST 2010
The gcc team lies.
Now gcc stops complaining about the bad branch instruction and creates bad object code.
----------------------------------------------------------------------
U mlton/trunk/package/debian/changelog
A mlton/trunk/package/debian/patches/00-fpic-on-mips.patch
----------------------------------------------------------------------
Modified: mlton/trunk/package/debian/changelog
===================================================================
--- mlton/trunk/package/debian/changelog 2010-02-05 16:21:38 UTC (rev 7410)
+++ mlton/trunk/package/debian/changelog 2010-02-06 10:18:18 UTC (rev 7411)
@@ -1,3 +1,9 @@
+mlton (20100206~svn-r7411) unstable; urgency=low
+
+ * Restored -fPIC work-around and reopened #552314.
+
+ -- Wesley W. Terpstra <terpstra at carrot.lan.lan> Sat, 06 Feb 2010 11:16:31 +0100
+
mlton (20100205~svn-r7410) unstable; urgency=low
* New snapshot from svn/HEAD
Added: mlton/trunk/package/debian/patches/00-fpic-on-mips.patch
===================================================================
--- mlton/trunk/package/debian/patches/00-fpic-on-mips.patch 2010-02-05 16:21:38 UTC (rev 7410)
+++ mlton/trunk/package/debian/patches/00-fpic-on-mips.patch 2010-02-06 10:18:18 UTC (rev 7411)
@@ -0,0 +1,25 @@
+diff -Nur -x '*.orig' -x '*~' mlton/bin/mlton-script mlton.new/bin/mlton-script
+--- mlton/bin/mlton-script 2009-11-07 17:29:05.000000000 +0100
++++ mlton.new/bin/mlton-script 2009-11-07 17:31:43.000000000 +0100
+@@ -115,6 +115,7 @@
+ -target-cc-opt openbsd '-I/usr/local/include' \
+ -target-cc-opt aix '-maix64' \
+ -target-cc-opt ia64 "$ia64hpux -mtune=itanium2" \
++ -target-cc-opt mips '-fPIC' \
+ -target-cc-opt sparc '-m32 -mcpu=v8 -Wa,-xarch=v8plusa' \
+ -target-cc-opt x86 \
+ '-m32
+diff -Nur -x '*.orig' -x '*~' mlton/runtime/Makefile mlton.new/runtime/Makefile
+--- mlton/runtime/Makefile 2009-11-01 18:36:04.000000000 +0100
++++ mlton.new/runtime/Makefile 2009-11-07 17:31:14.000000000 +0100
+@@ -84,6 +84,10 @@
+ AR := ar -X 64 rc
+ endif
+
++ifeq ($(TARGET_ARCH), mips)
++FLAGS += -fPIC
++endif
++
+ ifeq ($(TARGET_ARCH), sparc)
+ FLAGS += -m32 -mcpu=v8 -Wa,-xarch=v8plusa
+ endif
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