RSSA backend

[Matthew Fluet]

> > > That solves most of the pseudo-register discrepencies between MACHINE and
> > > X86 versions of liveness.  
> 
> One remaining case has to do with Arith transfers.  Some arithmetic
> operations are required for the overflow check, but if their result isn't
> used, then MACHINE says that the destination pseudo-reg is live at the
> success branch, even though it won't be used.

I take this back; it's another case like the unnecessary selects.  There
is an extraneous move at the success branch that makes the temporary look
live until that move is eliminated by the dead code elimination.