[MLton] gc question

[Jake Donham]

Matthew Fluet <fluet at tti-c.org> writes:

> > How do the stack limit checks account for the stack space used for
> > spilled registers?
> 
> There is no need to, since spilled registers don't get spilled to the
> (ML) stack.

I see. If I read it correctly, the C codegen keeps the frontier and ML
stack in locals (and of course the C stack in %esp) while the native
codegen keeps the frontier in %esp and the ML stack in %ebp.

In a parallel setting, for the native codegen, perhaps it would be
best to spill to a per-processor area to avoid losing a register for
the C stack? But I will stick with the C codegen for now.

> The Machine IL or the RSSA IL is definitely the place to insert the
> write barrier.  There is a form of write barrier for the card marking
> when the generational collector is being used; this is inserted in the
> SSA-to-RSSA pass.  As with card marking, you may benefit from MLton's
> accurate type information which ensures that you know (at compile
> time) whether or not a word sized data element is a pointer or not.

OK, great, that sounds like just what I need.

Thanks,

Jake