[MLton] Re: PIC in amd64 assembly
    Matthew Fluet 
    fluet at tti-c.org
       
    Wed Aug 20 17:49:05 PDT 2008
    
    
  
On Mon, 28 Jul 2008, Wesley W. Terpstra wrote:
> On a side note, why is it that in the code toAddressMemLoc
> (amd64-allocate-registers.fun), when constructing disp, the base and the
> index are simply added together if both are immediate? Shouldn't the index
> be scaled?
An immediate index is scaled at the construction of the MemLoc.t; see, for 
example, amd64.MemLoc.imm in amd64.fun.
    
    
More information about the MLton
mailing list