[jlouis@miracle.mongers.org: Re: [MLton] cvs commit: sped up output1 a lot]

Jesper Louis Andersen jlouis@mongers.org
Fri, 2 Jan 2004 21:59:00 +0100

Heh, once again I forget that I need to hit ,g to do a group reply
instead of r to to a reply to the from adress. Here is what Stephen
got from me:

----- Forwarded message from Jesper Louis Andersen <jlouis@miracle.mongers.org> -----

From: Jesper Louis Andersen <jlouis@miracle.mongers.org>
To: Stephen Weeks <sweeks@mlton.org>
Date: Fri, 2 Jan 2004 21:53:47 +0100
Subject: Re: [MLton] cvs commit: sped up output1 a lot
Message-ID: <20040102205346.GA4919@miracle.mongers.org>
User-Agent: Mutt/1.4.1i

Quoting Stephen Weeks (sweeks@mlton.org):

>   For completeness, here is the C and SML code.  If someone could do a
>   sanity check on my timings that would be nice.

I ran 10 tests of each of the code things and processed them with

awk '{sum+=$1; count++} END {print sum/count}'

The results follow. I have a FreeBSD 5.2-RC2 as my laptop and a 
NetBSD-1.6ZF as workstation. Both were set to run the tests so we
get some timings on some non-linux platforms. This is good since we
see if it behaves otherwise on any of those. Glancing at the numbers
below my comment would be something along the the lines of ''thumbs
up'' for the change, since it vastly improves speed on both OS's.

Really nice work.

FreeBSD annah 5.2-RC FreeBSD 5.2-RC #0: 
Wed Dec 31 05:36:50 CET 2003     
root@annah:/usr/obj/usr/src/sys/ANNAH  i386

CPU: Mobile Intel(R) Pentium(R) III CPU - M  
		1133MHz (1129.58-MHz 686-class CPU)
  Origin = "GenuineIntel"  Id = 0x6b4  Stepping = 4

(They are known as Tualatin CPUs and have a 512Kb 2nd level cache at
 full processor speed)

old MLton:
MLton MLTONVERSION (built Wed Dec 31 06:00:10 2003 on annah)

new MLton:
MLton MLTONVERSION (built Fri Jan  2 21:32:09 2004 on annah)

slow C: 32.1664 secs
fast C: 15.076
old MLton: 58.626
new MLton: 22.98


NetBSD sarah 1.6ZF NetBSD 1.6ZF (SARAH) #2: 
  Thu Dec 25 18:31:59 CET 2003  
  root@sarah:/usr/src/sys/arch/i386/compile/SARAH i386

cpu0: AMD Athlon XP 2000+ (686-class), 1666.30 MHz, id 0x662
cpu0: features c3c3fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features c3c3fbff<PGE,MCA,CMOV,PAT,PSE36,MMXX,MMX>
cpu0: features c3c3fbff<FXSR,SSE,3DNOW2,3DNOW>
cpu0: I-cache 64 KB 64b/line 2-way, D-cache 64 KB 64b/line 2-way
cpu0: L2 cache 256 KB 64b/line 16-way
cpu0: ITLB 16 4 KB entries fully associative, 8 4 MB entries fully associative
cpu0: DTLB 32 4 KB entries fully associative, 8 4 MB entries 4-way
cpu0: 8 page colors

old MLton:
MLton MLTONVERSION (built Mon Dec 29 21:22:46 2003 on sarah)

new MLton:
MLton MLTONVERSION (built Fri Jan  2 20:51:02 2004 on sarah)

slow C: 6.37 (This is the right number, I crosschecked it)
fast C: 6.40111
old MLton: 23.6544
new MLton: 9.349



----- End forwarded message -----