[MLton] Interference Graphs
fluet at tti-c.org
Mon Feb 12 11:42:06 PST 2007
> Does mlton do interprocedural register allocation (or if not could it be
> modified easily to build interference graphs in a suitable manner), and
> would it be possible to output interference graphs in a parseable manner?
MLton does not do interprocedural register allocation. It does use a
very simple convention of keeping the ML stack pointer and ML heap
pointer in registers across function calls, but you can consider this
just a particular calling convention.
You could certainly write a pass to build and output interference
graphs. You'd have to decide on which intermediate language to work on.
I would suggest either the SSA2 or SSA IL. (SSA2 makes the mutability
of fields of objects explicit (enabling some of those flattening
optimizations that Wesley described on MLton-user)), but otherwise they
are fairly similar.) These should express sufficient information to
make interesting interference graphs, and you won't get bogged down with
a lot of runtime information that is added by the RSSA and Machine ILs.
In the SSA ILs, you would simply take SSA variables as temporaries and
build the interference graph based on their uses.
MLton doesn't build interprocedural interference graphs; it does build
an intraprocedural interference graph to convert from the RSSA IL to the
Machine IL (see http://www.mlton.org/ToMachine).
We'd be happy to provide more suggestions if you have a little more
detail about what kind of information you would like.
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